"100 Squared"TM System Documentation

By NEW MICROS INC.

1601 Chalk Hill Rd.

Dallas, Texas 75212

Phone (214) 339-2204

Fax (214) 339-1585

Email: nmitech@newmicros.com

http://www.newmicros.com

Covers: NMIX-0021 Rev. 1.0 10/10/86

NMIX-0022 Rev. 1.0

NMIT-0021 Rev. 1.0

NMIT-0022 Rev. 1.0

NMIX-0021 Rev. 2.0 & 2.1 12/13/87

NMIX-0022 Rev. 2.0 & 2.1

NMIT-0021 Rev. 2.0 & 2.1

NMIT-0022 Rev. 2.0 & 2.1

Getting Started

The "100 Squared"TM, when purchased in development configuration,

is complete and ready to run. To operate the system, plug in the

wall transformer and connect a terminal to the serial RS-232

DB25F connector. Most terminals should plug in directly, with a

straight through cable (ie: pin 1 to pin 1, 2 to 2, 3 to 3,

etc.). The"100 Squared"TM uses only lines 2 and 3 for serial in

and serial out respectively, and pins 1 and 7 for ground. Many

terminals require additional handshaking signals to work, so pins

4 and 5 are hooked together on the DB25F connector, as are pins 6

and 20. In this way the terminals that require the additional

handshake signal have their own " clear to send" / "ready to

send" and "data terminal ready" / "data set ready" signals

wrapped back around, indicating "always ready".

In order to talk to the "100 Squared"TM the terminal must have

the correct bit settings. The baud rate should be set at 9600

baud for 2 Mhz systems (8 Mhz crystal), 4800 for 1 Mhz systems (4

Mhz crystal). The "100 Squared"TM sends and receives a bit

protocol of one start bit, eight data bits and one stop bits.

------+---+---+---+---+---+---+---+---+

START | 0 | 1 | 2 | 3 | 4 | 5 | 6 | 7 | STOP

+---+---+---+---+---+---+---+---+------

When the terminal is set correctly, every time you depress and

release the red reset button the "100 Squared"TM should respond

with:

Max-FORTH Vx.x

Seeing that message means the terminal can see the "100

Squared"TM. Press "return" on your terminal several times. If

the "100 Squared"TM responds with "OK" each time, communications

are established.

Now you will want to see the system do something. Type WORDS fol-

lowed by a return. This will cause the system to list its entire

vocabulary, some 200+ words. The listing can be stopped at any

time by pressing a key, like the space bar.

When the F68HC11 powers up, it assumes nothing else on the board

is working, so it defaults to its own internal RAM. As a result

there is a limited terminal input buffer area (16 characters) and

dictionary space. The "100 Squared"TM provides external memory

expansion. You now need to tell the system to move its terminal

input buffer and dictionary to external memory. If the RAM is

installed at 0100-1FFF (factory default for single 8K RAM) the

following will accomplish that.

HEX

100 TIB !

50 TIB 2+ !

200 DP !

1

Now try a simple program to exercise some of these words. Enter:

: TYPE-LETTERS 5B 41 DO I EMIT LOOP ;

TYPE-LETTERS

to which the machine will respond:

: TYPE-LETTERS 5B 41 DO I EMIT LOOP ; OK

TYPE-LETTERS ABCDEFGHIJKLMNOPQRSTUVWXYZOK

Now have a look at memory with the DUMP command. Type:

0000 80 DUMP

and examine the results (remember we put the machine in HEX).

Try another WORDS and observe the first word displayed. It has

become the word TYPE-LETTERS entered above.

Your "100 Squared"TM is now running and communicating as it

should. Its time to begin your design project by learning more

about how to use the "100 Squared"TM.

The "100 Squared"TM, when purchased in the generic target con-

figuration, is a minimum, 5 Volt only, configuration. The

F68HC11, Xtal, reset circuit, various HC "glue" components and

three 28 pin JEDEC sockets. Typically, a program developed in

the "development configured" board will be installed in the

"generic target configured" board for production of a dedicated

application. The user must install the appropriate jumpers,

which are not provided in the target configuration.

All configurations of the F68HC11 based "100 Squared"TM boards

use the same base PC board. This includes the NMIX-0021, the

NMIX-0022, the NMIT-0021 and the NMIT-0022. Configuration dif-

ferences refer to the extent to which the board is filled with

components.

2

PARALLEL PORTS

The F68HC11 has five parallel ports, Port A, B, C, D and E. Al-

though some port lines have special multiplexed functions, they

can all be used as inputs or as outputs according to their in-

dividual designs. Some of the port lines have direction

registers allowing them to be used as either inputs or outputs.

Two ports of the F86HC11 are sacrificed to create an 64K address

and data bus. The 68HC24 simulates the replacement of those

ports. Three ports of the F68HC11 and two replacement ports of

the 68HC24 are brought out to connector J2. Power and ground are

also available on J2.

"100 SQUARED"TM DOCUMENTATION

INPUT/OUTPUT JACKS J2

TOP VIEW

FRONT (EDGE) OF CARD v

- X PA7 o o PA6 O

| O PA5 o o PA4 O

| O PA3 o o PA2 I

| I PA1 o o PA0 I

20 pin header | +5 o o +5

group | GND o o GND

| O PB7 o o PB6 O

| O PB5 o o PB4 O

| O PB3 o o PB2 O

- O PB1 o o PB0 O

+5 o o +5

GND o o GND

- X PC7 o o PC6 X

| X PC5 o o PC4 X

| X PC3 o o PC2 X

| X PC1 o o PC0 X

| +5 o o +5

| GND o o GND

| O PD7 o o PD6 I

| X PD5 o o PD4 X

34 pin header | X PD3 o o PD2 X

group | X PD1 o o PD0 X

| +5 o o +5

| GND o o GND

| I PE7 o o PE6 I

| I PE5 o o PE4 I

| I PE3 o o PE2 I

| I PE1 o o PE0 I

- +5 o o +5

GND o o GND

I=INPUT O=OUTPUT X=EITHER

F68HC11 "100 SQUARED"TM NMIX-0022 REV 1.0 & 2.x BOARDS 11/13/87

3

The lines can be used as individual inputs or outputs or in com-

bination. There are very few applications, however, where pins

are switched dynamically, sometimes used as inputs, sometimes as

outputs.

The simplest form of input device is a switch to ground, to

create a low level when the switch is closed, with a pullup to

give a high level when the switch is open. This switch can be

breaker points, reed switch, the contacts of a relay, micros-

witch, etc. To try an example of this type input, hook up a

simple push button switch to Port A Line 0 (PA0) with a 10K ohm

pull up resistor to +5.

The following program will show the current state of the switch.

Enter LOOK after pushing reset. (Reset sets the ports to all

"ones".)

B000 CONSTANT PA

: SWITCH PA C@ 1 AND ;

: CHECK-STATE IF ." OPEN" ELSE ." CLOSED" THEN CR ;

: LOOK SWITCH BEGIN SWITCH 2DUP = IF DROP ELSE SWAP 0=

CHECK-STATE THEN ?TERMINAL UNTIL ;

LOOK

Whenever the switch changes state, open or closed, the computer

follows with a written report.

Other possible input devices are shown here.

4

Note that due to the 10K pull up on the port, the "switch" must

sink .5 ma to ground with no more voltage rise than an HC low

level (2/10ths of Vcc) at the pin. (A voltage of 7/10 Vcc will

always be recognised as a logical one.) Voltages applied above

Vdd or below 0 Volts can damage the computer.

The outputs of the F68HC11 and 68HC24 can sink 1.6 ma to ground

while letting the pin go no higher than 0.4 Volts for a "zero"

and source about .8 ma at 4.5 Volts for a "one". In terms of con-

trol, this is a very small signal. Most relays require over 50

times more current to operate. LED's typically take 5 ma to be

visible. HC levels are such that the output is sufficient to

drive the input on one pin of one TTL device or about a dozen of

the lower power LSTTL inputs. The output is sufficient to drive

VMOS FET's and Darlingtons with an external pull up which can in

turn control several amps of current. Usually, however, a buffer

will be needed to do serious non-HC interfacing.

5

To test the output capabilities, wire one of the two circuits

shown here or use an oscilloscope or logic probe.

When the output is a "1" the LED will be on. When the output is

a "0" the LED will be off. The following program will exercise

the outputs of the 68HC24.

: RUN-UP FF B007 C! 0 BEGIN 1+ DUP B003 ! ?TERMINAL UNTIL ;

Notice that the low lines of Port B are changing so fast the LED

appears to be on continuously at low brightness. Higher numbered

Port B lines and Port C lines toggle at slower rates. Each bit

position toggles at 1/2 the speed of the next lower bit.

6

SERIAL I/O

The F68HC11 has a full duplex hardware serial channel that

operates at HC levels. To use this serial channel with most stan-

dard communications interfaces, level converters are needed.

Drivers for RS-232C and IEEE 422/485 drivers are on the boards.

(It should be noted that only one combination of RS-232 driver,

RS-422 drivers or RS-485 driver should be used at one time to

avoid contention of their receiver outputs.)

A zero by RS-232C specification is any voltage from +3 to +15

Volts, a one is between -3 and -15 Volts. To convert the HC sig-

nals to the voltage ranges of that interface standard, the "100

Squared"TM Rev. 1.0 uses a single 16 pin device, the MC145406.

The circuit is shown here.

The 145406 is ideally suited for this use. It not only provides

an RS-232 receiver and transmitter pair for the F68HC11 proces-

sor, but also two spare RS-232 receiver and transmitter pairs

which can be used with port lines for handshaking or software

driven UARTS, etc..

The RS-422 standard represents a relatively new interface now com-

ing into popularity, and with good reason. Unlike the RS-232 re-

quirements which specify a single wire voltage transmission

referenced to ground, the RS-422 standard uses a voltage differen-

tial on a pair of conductors. While the RS-232 at full volatge

drive levels in electrically noisy environments is barely reli-

able at distances to 1000 feet, RS-422 signals are considered

reliable at distances up to 4000 feet. The 422 drivers operate,

requiring only a single sided 5 Volt supply, over twisted pairs

of wires. A full duplex connection for RS-422 requires two

twisted pairs, one for transmit, one for recieve.

The RS-485 interface uses the same specifications for its trans-

mitters and receivers. It, however, allows a single twisted pair

to be used for incoming and outgoing messages. This is ac-

complished by having both a transmitter (with 3 state abiltity)

and a reciever tied in parallel to the same twisted pair. Mul-

tiple drop point communications are possible under this scheme

(up to 64 pairs by specification). Of course, in application the

transmitter turns on and takes control of the lines only under

software control. The actual implemmentation of this control

7

will be determined by the particular protocol being used in the

communication network. Usually one master sends an addresses mes-

sage to one of multiple slaves and then turns off its master

transmitter. The addressed slave, recognizing its address will

turn on its transmitter and respond with the requested data.

These two interfaces are accomodated on the "100 Squared"TM by

the addition of two 8 pin 75176's, which each contain a

transmitter/receiver pair. Whether the transmitter of the pair

is active, or not, is controlled by a signal on one of its pins.

One of the 75176's (U11) has its receiver always enabled. It is

used exclusively as the RS-422 receiver. The other 75176 (U12)

can be used as the RS-422 transmitter if jumper C on the "100

Squared"TM is grounded (ie: in 422 position), or it can be used

as the receiver and transmitter for the RS-485 interface as con-

trolled by PA3 (ie: in 485 position). In this case if PA3 is

high, the 75176's transmitter is not active. If PA3 is low its

transmitter is active.

The RS-422/485 interface circuit is shown below.

8

POWER SUPPLY

The power supply circuit on the "100 Squared"TM is designed to

allow the board to operate from a simple AC wall transformer. It

has three major sub circuits - rectification, regulation and DC

to DC conversion. Rev 2.x added battery backup capabilities to

the 28 pin JEDEC sockets and the F68HC11 internal RAM, and an im-

proved power-up power-down reset circuit.

The bridge rectifier converts the AC to DC. The 7805 regulates

this rectified incoming voltage to a constant 5 Volts.

The most unusual feature of the power supply is the use of the DC

to DC converter, the ICL 7660. On NMIx-002x boards the 7660 is

fed from the 5 Volt rail. The two voltages are used to power the

RS-232 converter circuit. This means the maximum output from the

RS-232 converter would be + and - 5 Volts.

The upper limit of +V is set by the ability of the 7805 to dis-

sipate heat. If a heat sink is added to the 7805, voltages in

excess of 20 Volts are possible. Driving the 7805 to hard,

however, will cause it to enter thermal overload and "shut down"

its output.

The typical current required by the "100 Squared"TM with 8K CMOS

RAM and the Max-FORTH ROM at 2 Mhz from 9 VAC is 20 ma.

The power terminal, J3, can be used as an alternate power source

instead of the AC supply. The 5 Volts applied at the terminal is

also applied to the 7660. The 5 Volt +/- rails are usually suffi-

cient to generate more than the +/- 3 Volts needed to meet the

RS-232 specification. Some terminals, however, may not fully

meet those requirements.

BATTERY BACK UP AND RESET

9

(Rev 2.x only)

The battery backup capability added to the Rev 2.x boards to al-

low data retention in otherwise volitale CMOS RAMs and the proces-

sors own internal RAM through main board power downs. A third

terminal has been added to the power connector, J3, marked VBB

for Voltage Battery Backup.

The VBB terminal on J3 is connected to the VBB supply rail on the

board by diode, D1. The VBB supply rail supplied the three 28

pin JEDEC sockets, the 8054HN low voltage indicator in the reset

circuit, the 74HC00 gate and the 74HC138 decoder. If no power is

applied to the VBB terminal, the VBB rail is supplied through the

intrinsic diode of P channel FET, Q1, to within a diode drop of

the suppling 5 volt rail (~4.4 Volts). When the 8054HN low volt-

age indicator releases the reset line, Q1 is turned on and the

VBB comes almost completely up to the 5 volt rail (~4.95 Volts).

(This may cause some problem with the Dallas Semiconductor DS1223

battery sockets, as they "write protect" their RAMs at 4.75

Volts. Running an elevated 5 Volt supply may be necessary to ac-

comodate these parts. The purpose of this new feature is,

however, to do away with the need for those devices in final sys-

tem configurations.)

When the 8054HN low voltage indicator holds the reset line low

(when VBB is below 3.8-4.2 Volts), Q1 is turned off and the ad-

dress decoder is disabled through the same input that is used by

MEMDIS. This "access" protects the memories during the power

down cycle.

To meet the full letter of the specifications of the parts in-

volved the correct backup voltage on the VBB pin is critical.

This supply must be low enough to ensure that after the diode

drop of D1, the VBB rail cause the 8054HN to issue a reset (~4.0

Volts), otherwise Q1 will remain on and the whole system will be

powered by VBB. It must also be high enough to ensure that after

the diode drop of D1, the VBB rail will meet the processors re-

quired backup volatge (listed as 4.0 Volts). Therefore, the

ideal voltage for the VBB supply is 4.3-4.5 Volts. It should be

pointed out however that the Motorola specification appears to be

overly conservative. By empirical test, VBB supplies below 3

Volts appear to be quite adequate. Most CMOS RAMs will retain

data down to 2.2 Volts. Accounting for the diode drop under such

low currents, the VBB supply may work as low as 2.5 Volts.

The proccess battery backup supply enters the chip via the MODB

pin. Jumper block D controls the setting of MODB, either to

ground or to VBB. For backup of the processor's RAM to be suc-

cessful jumpers D and E must be in the Single Chip or Expanded

Multiplexed settings. When the VBB supply is used on the proces-

sor, it will retain its User Area through power down and remember

its linkages to the external FORTH dictionary.

10

ADDRESS DECODING

The chip selects of the three JEDEC sockets are generated by a

74HC138. When jumpers A and B are in the 8K position, address

lines A15 to A13 are brought to this part. This means that each

of the eight generated chip selects represent a single 8K byte

segment out of the 64K byte memory map.

When jumpers A and B are in the 16K position, address lines A15

and A14 are brought to this part. The A13 is held high. This

means that the upper four generated chip selects represent a

single 16K byte segment out of the 64K byte memory map.

When jumpers A and B are in the 32K position, address lines A15

alone controls the part. The A14 and A13 are held high. This

means that each of the two upper chip selects represent a 32K

byte segments out of the 64K byte memory map.

Two other signals control the decoder - Address Strobe (AS) and

On Board Memory Disable (MEMDIS). The Address Strobe (AS) signal

must be active low before any chip selects are enabled. This is

the processor's signal indicating the address on the bus is valid

for the off-chip memory. The On Board Memory Disable (MEMDIS)

signal allows an offboard open collector source to disable the on

board decoder, so offboard components can usurp a memory segment

from on board memory, even if the entire 64K is filled with RAM

on the main board.

74HC138

A13 A +5V +----u----+

o o o --|A Vcc|-+5V +------+

A14 B +5V | | | | ______________

o o o --|B O0|-O0---| o o |-+-U2 CHIP SELECT

| | | | |

REV 2.x A15-|C O1|-O1---| o o |-+

__ v _ |_ | | | |

AS E-|E O2|-O2---| o o |-+

MEMDIS __ |_ | | | |

+ AS-|E O3|-O3---| o o |-+

RESET ______ | | | | |

E MEMDIS-|E O4|-O4---| o o |-+

| | | | ______________

+---O7-|O7 O5|-O5---| o o |-+-U3 CHIP SELECT

| | | | | |

| GND-|GND O6|-O6---| o o |-+

| +---------+ | | ______________

+-----------------------| *--* |---U4 CHIP SELECT

+------+

* Rev 1.0 boards do not have a jumper block in this postion - U4

Chip Select is hard wired to the socket. On 2.x boards this

jumper block is installed - the jumpered connection of the high

order chip select to U4 is user selectable.

11

TROUBLESHOOTING

As always the first thing to do when troubleshooting is to check

the power and ground connections. An oscilliscope should be used

to check signals. The heat sink of the 7805 is a convenient

place to hook a ground clip. If +5 Volts is present at J3 and

the board is not operational, the next item to check is the oscil-

lator. Putting the scope on EXTAL (Pin 7) should show a 8 Mhz

sine wave (4 Mhz F68HC11 parts running 4 Mhz XTAL's) running from

about .5 Volt lows to 4.5 Volt peaks. XTAL (F68HC11 Pin 8)

should have an identical signal, but of a much smaller amplitude.

If the sine waves are not present and there is 5V present at the

power pin Vcc (Pins 26), and ground at Vss (Pin 52), then either

the F68HC11 or the crystal are bad and require replacement.

There is one exception. If the processor has executed a STOP in-

struction, the oscillator will stop. When the oscillator is

functioning correctly a 2 Mhz (1 Mhz) clean running square wave

should be present at the E output (Pin 5). The E signal drives

the timing for all external memory transfers. This signal should

transition nearly rail to rail, a 0.4V low and a 4.6V high are

normal. Less amplitude can indicate a board short or an exces-

sive load on the line external to the F68HC11.

The serial channel should send a sign on message if no autostart

ROM interferes. If not, the reset circuit could be bad, the

serial converter could have failed, or the F68HC11 could be defec-

tive. With the reset button depressed the RES pin (Pin 17)

should be at ground. When release, the pin should rise to 5

Volts in about a quarter second. If the reset pin is working and

still no message is seen on the terminal, check PD1, the serial

output line (Pin 33). When reset is exercised, this line should

go from normally high through a multitude of toggles back to a

high state. The periods of the toggle transitions are multiples

of approximately 100 microseconds. If this signal is not

present, and there are no user ROMs in the board, the F68HC11 is

suspect. If the signal is present, check pin 3 of the DB25F con-

nector. It should normally be at -V (-5 Volts nominally) and

should toggle to +V (+5 Volts nominally) at the same rate as the

serial output line. If this is happening and no message is seen,

the RS-232 wiring or the terminal is suspect. Check to see if J1

is connected to the DB25F RS-232 connector as follows:

DB25F Signal Name

----- ------ ----

1 Case ground

2 Serial in (to "100 Squared"TM)

3 Serial out (from "100 Squared"TM)

7 Electrical ground

Check the voltages on pins 2 and 3. If pin 3 is very negative and

pin 2 is floating, both systems are trying to talk on the same

line. Pins 2 and 3 need to be swapped. Usually this is done

with a "null modem" inserted where the two systems connect.

12

If the -V/+V signal was not found at pin 3, the RS-232 converter

is not working. Check pin 1 of the 145406 for +V and pin 8 of

the 145406 for -V. If -V is not present at the -V pin, the 7660

has failed. Pin 7 of the 145406, the output, should look the

same as pin 3 of J1.

Check pin 2 of J1 which is the serial into the board from the ter-

minal. It should normally be at a negative voltage between -3

and -15 Volts. When a key is pressed on the terminal it should

pulse to positive voltages between +3 and +15 Volts. If it

doesn't, the terminal or the RS-232 wiring are suspect. The same

signals at inverted TTL levels, should also be at PD0, which is

the serial input line of the processor (Pin 34).

The most common error in trying to use the "100 Squared"TM is mis-

matched baud rates or bit settings. Verify that the terminal is

set for 9600 baud with one start bit, eigth data bits and one

stop bits, with no parity generated. (Review this discussion in

the Getting Started section.)

13

MEMORY MAP

K# HEX

-- -----

64 $FFFF +------------+

63 | RUN TIME |

62 | KERNEL |

61 | |

60 |NON RUN TIME| Max-FORTH ROM

59 | CODES |

58 | |

57 | HEADS |

56 $E000 |____________|

$DFFF | |

| |

| |

| |

| |

| |

| |

| |

| |

| |

| |

| |

| |

| |

| |

| |

| |

| |

| |

| |

$B800 |____________|

$B600 |____________|EEPROM

| |

| |

$B000 |============| REGISTERS

| |

| |

~ ~

~ ~

| |

| |

5 | |

4 $1000 |$0B_AT_$103B|

3 $C000 | |

2 $0800 | |

1 $0400 | |

0 $0000 +ON=CHIP=RAM=+

14

"100 SQUARED"TM DOCUMENTATION

MISCELLANEOUS JUMPERS

# SOURCE DESTINATION NORMALLY

-------- ------------------ ----------------------- --------

A

A13-A ADDRESS LINE 13 ADDRESS DECODER INPUT

A-5 +5 VOLT RAIL

B

A13-A ADDRESS LINE 13 ADDRESS DECODER INPUT

A-5 +5 VOLT RAIL

C

O0-U2 DECODER OUTPUT 0 U2 JEDEC SOCKET

O1-U2 DECODER OUTPUT 1 U2 JEDEC SOCKET

O2-U2 DECODER OUTPUT 2 U2 JEDEC SOCKET

O3-U2 DECODER OUTPUT 3 U2 JEDEC SOCKET

O4-U2 DECODER OUTPUT 4 U2 JEDEC SOCKET

O5-U3 DECODER OUTPUT 5 U3 JEDEC SOCKET

O6-U3 DECODER OUTPUT 6 U3 JEDEC SOCKET

O7-U4 DECODER OUTPUT 7 U4 JEDEC SOCKET *

D

GND-D GROUND MODB PIN OPEN

D-5 MODB PIN +5 VOLT RAIL CLOSED

E

GND-E GROUND MODA PIN OPEN

E-5 MODA PIN +5 VOLT RAIL CLOSED

F

XIRQ-B NMI INT FROM J4 OPEN

B-IRQ INT FROM J4 PA3 EDGE SENSITIVE LINE OPEN

G

485-C PA3 U12 PINS 2 & 3

C-422 U12 PINS 2 & 3 GROUND

I

U2 U2 PIN 27 R/W LINE U2 PIN 28 SUPPLY OPEN**

J

U3 U3 PIN 27 R/W LINE U3 PIN 28 SUPPLY OPEN**

K

U4 U4 PIN 27 R/W LINE U4 PIN 28 SUPPLY OPEN**

* Rev 1.0 is hard wired to U4, Rev 2.x is jumper selectable

** Rev 2.x has option of pullups on R/W lines to write protect

RAMs in socket. To use install 100K pullup resistor & remove

jumper from 28 pin JEDEC selection socket for pin 27.

If battery backup is in use, RAM will then emulate ROM.

15

"100 SQUARED"TM DOCUMENTATION

GENERAL PURPOSE SOCKET

Jumper Assignments for JEDEC 28 Pin Sockets

+---+

JUMPER 1 o o 28 +5 | o | *

| |

A12 2 o o 27 JUMPER | o |

+---+

A7 3 o o 26 JUMPER

A6 4 o o 25 A8

A5 5 o o 24 A9

A4 6 o o 23 A11

A3 7 o o 22 OE

A2 8 o o 21 A10

___________

A1 9 o o 20 CHIP SELECT

A0 10 o o 19 D7

D0 11 o o 18 D6

D1 12 o o 17 D5

D2 13 o o 16 D4

GND 14 o o 15 D3

PIN 1 PIN 26 PIN 27

O---O O---O O---O

O O O O O O

A14 +5 +5 A13 A14 RR/W

* Rev 2.x has option of pullups on R/W lines to write protect

RAMs in socket. To use, install 100K pullup resistor & remove

jumper for pin 27. If battery back up is in use, RAM will then

emulate ROM.

16

"100 SQUARED"TM DOCUMENTATION

GENERAL PURPOSE SOCKET - U6, U7, U8

Jumper Settings for Standard JEDEC 24/28 Pin Devices

ALL 8K X 8 DEVICES

2764

2864

6264

PIN 1 PIN 26 PIN 27

+---+---+---+---+---+---+

| | X | X | | | X | *

| | X | X | | | X |

+---+---+---+---+---+---+

A14 +5V +5V A13 A14 RR/W

16K X 8 EPROM

27128

PIN 1 PIN 26 PIN 27

+---+---+---+---+---+---+

| | X | | X | | X |

| | X | | X | | X |

+---+---+---+---+---+---+

A14 +5V +5V A13 A14 RR/W

32K X 8 EPROM

27256

PIN 1 PIN 26 PIN 27

+---+---+---+---+---+---+

| | X | | X | X | |

| | X | | X | X | |

+---+---+---+---+---+---+

A14 +5V +5V A13 A14 RR/W

32K X 8 RAM

62256

PIN 1 PIN 26 PIN 27

+---+---+---+---+---+---+

| X | | | X | | X | *

| X | | | X | | X |

+---+---+---+---+---+---+

A14 +5V +5V A13 A14 RR/W

* Rev 2.x has option of pullups on R/W lines to write protect

RAMs in socket. To use, install 100K pullup resistor & remove

jumper for pin 27. If battery backup is in use, RAM will then

emulate ROM.

17

"100 SQUARED"TM DOCUMENTATION

GENERAL PURPOSE SOCKET - U6, U7, U8

Jumper Settings for Various Addressing Schemes

3 8K DEVICES

A13 A +5V

+---------+

| XXXX o |

+---------+ 8K POSITION

| XXXX o |

+---------+

A14 B +5V

C

+------+ ___________ 0000

0000-1FFF O0 | XXXX |-+-U2 CHIP SELECT ----

| | | 1FFF

2000-3FFF O1 | o o |-+

| | |

4000-5FFF O2 | o o |-+

| | |

6000-7FFF O3 | o o |-+

| | |

8000-9FFF O4 | o o |-+

| | ___________ C000

A000-BFFF O5 | o o |-+-U3 CHIP SELECT ----

| | | DFFF

C000-DFFF O6 | XXXX |-+

| | ___________ E000

E000-FFFF O7 | *--* |---U4 CHIP SELECT ----

+------+ FFFF

* Rev 1.0 is hard wired to U4, Rev 2.x is jumper selectable

18

3 16K DEVICES

A13 A +5V

+---------+

| o XXXX |

+---------+ 16K POSITION

| XXXX o |

+---------+

A14 B +5V

C

+------+

O0 | o o |-+

| | | ___________ 0000

0000-3FFF O1 | XXXX |-+-U2 CHIP SELECT ----

| | | 3FFF

O2 | o o |-+

| | |

4000-7FFF O3 | o o |-+

| | |

O4 | o o |-+

| | ___________ 8000 **

8000-BFFF O5 | XXXX |-+-U3 CHIP SELECT ----

| | | BFFF

O6 | o o |-+

| | ___________ C000

C000-FFFF O7 | *--* |---U4 CHIP SELECT ----

+------+ FFFF

* Rev 1.0 is hard wired to U4, Rev 2.x is jumper selectable

** See appnote on PRU overmapping cautions

19

2 32K DEVICES

A13 A +5V

+---------+

| o XXXX |

+---------+ 32K POSITION

| o XXXX |

+---------+

A14 B +5V

C

+------+

O0 | o o |-+

| | |

O1 | o o |-+

| | |

O2 | o o |-+

| | | ___________ 0000

0000-7FFF O3 | XXXX |-+-U2 CHIP SELECT ----

| | | 7FFF

O4 | o o |-+

| | ___________

O5 | o o |-+-U3 CHIP SELECT ----

| | |

O6 | o o |-+

| | ___________ 8000 **

8000-FFFF O7 | *--* |---U4 CHIP SELECT ----

+------+ FFFF

* Rev 1.0 is hard wired to U4, Rev 2.x is jumper selectable

** See appnote on PRU overmapping cautions

20

"100 SQUARED"TM DOCUMENTATION

SERIAL INPUT/OUTPUT JACKS J1

TOP VIEW

NUMBERED LEFT TO RIGHT

1 2 3 4 5 6 7 8 9 10 11 12 13 14

----------------------------------------

o o o o o o o o o o o o o o

DB25F J1 Signal Name

----- --- -----------------------------

1 Spare RS-232 in

2 Spare RS-232 out

3 Spare RS-232 in

4 Spare RS-232 out

1 5 Case ground

2 6 Serial into "100 Squared"TM

3 7 Serial out of "100 Squared"TM

7 8 Electrical ground

9 Reset line in or out

10 Electrical ground

11 RS-422 Receive + Differential input or 485 xcv

12 RS-422 Receive - Differential input or 485 xcv

13 RS-422 Receive + Differential output

14 RS-422 Receive - Differential output

21

"100 SQUARED"TM DOCUMENTATION

INPUT/OUTPUT JACKS J2

TOP VIEW

FRONT (EDGE) OF CARD v

- X PA7 o o PA6 O

| O PA5 o o PA4 O

| O PA3 o o PA2 I

| I PA1 o o PA0 I

20 pin header | +5 o o +5

group | GND o o GND

| O PB7 o o PB6 O

| O PB5 o o PB4 O

| O PB3 o o PB2 O

- O PB1 o o PB0 O

+5 o o +5

GND o o GND

- X PC7 o o PC6 X

| X PC5 o o PC4 X

| X PC3 o o PC2 X

| X PC1 o o PC0 X

| +5 o o +5

| GND o o GND

| O PD7 o o PD6 I

| X PD5 o o PD4 X

34 pin header | X PD3 o o PD2 X

group | X PD1 o o PD0 X

| +5 o o +5

| GND o o GND

| I PE7 o o PE6 I

| I PE5 o o PE4 I

| I PE3 o o PE2 I

| I PE1 o o PE0 I

- +5 o o +5

GND o o GND

I=INPUT O=OUTPUT X=EITHER

F68HC11 "100 SQUARED"TM NMIX-0021/2/3 REV 1.0 & 2.x 11/13/87

22

"100 SQUARED"TM DOCUMENTATION

EXPANSION JACK J4

MEMDIS o o N.C.

E o o RST

A15 o o INT

A14 o o +5

A12 o o R/W

A7 o o A13

A6 o o A8

A5 o o A9

A4 o o A11

A3 o o OE

A2 o o A10

A1 o o AS

A0 o o D7

D0 o o D6

D1 o o D5

D2 o o D4

GND o o D3

The J4 expansion connector was designed to follow the JEDEC stan-

dard for byte sized memory parts in the 8, 16 and 32K Byte

varieties. The J4 connector on these boards are made to most

closely match the more recently available 32K JEDEC parts.

23

NEW MICROS, INC.

NMIX-0021/2 F68HC11 "100 SQUARED"TM PARTS LIST REV 1.0 & 2.x

PART# GENERIC DESCRIPTION

----- ------------------- -----------------------------------

U1 52 PIN SOCKET

F68HC11 FORTH CPU

U2 28 PIN SOCKET

2064 8K x 8 RAM

U3 28 PIN SOCKET

U4 28 PIN SOCKET

2064/20256 OPTIONAL MEMORIES U4,5

U5 44 PIN SOCKET

F68HC24 PRU PRT RPLCMNT UNT (NMIX-0022 ONLY)

U6 8 PIN SOCKET

7660 DC/DC CONVERTER

U7 14 PIN SOCKET

74HC00 NAND GATE

U8 16 PIN SOCKET

74HC138 ADDRESS DECODING PROM

U9 20 PIN SOCKET

74HC373 8 BIT LATCH

U10 16 PIN SOCKET

145406 RS-232 CONVERTOR

U11,12 8 PIN SOCKETS

75176 RS-422/485 DRIVERS

Y1 8 MHZ XTAL

J3 SCREW TERMINAL 2 PIN .194" CONN (Rev 1.0 only)

J3 SCREW TERMINAL 3 PIN .194" CONN (Rev 2.x only)

J4 34 PIN VSC HEADER .1" DUAL INLINE

R0 10K 1/8 WATT RESISTOR (Rev 2.x only)

R1 1Meg 1/8 WATT RESISTOR

R2-5 10K 1/8 WATT RESISTOR

R6 10K 1/8 WATT RESISTOR (Rev 1.0 only)

C1,2 220uf 16V ELECTROLYTIC CAP

C3,4 10uf 16V ELECTROLYTIC CAP

C5 10uf 16V ELECTROLYTIC CAP (Rev 1.0 only)

C6,7 20 pf CERAMIC DISC

C8-14 .1uf MONOLYTHIC BYPASS

C15 .1uf MONOLYTHIC BYPASS (Rev 2.x only)

LVI1 8054HN POWER ON RESET MONITOR (Rev 2.x)

Q1 VP0300L P CHANNEL FET (Rev 2.x only)

D1 1N4148 OR 1N914 SIGNAL DIODE

CR1 VM08 BRIDGE RECTIFIER

VR1 7805 5V REGULATOR

PCB 100 SQUARED NMIX-0021/2/3 PCB REV 1.0 or 2.x

JUMPER PINS BERG STYLE .1" CENTER JUMPERS

JUMPER SHUNTS BERG STYLE .1" CENTER SHUNTS

S1 MOMENTARY PUSH RESET SWITCH

9V WALL PLUG A.C. POWER TRANSFORMER

CASE ALUMINUM EXTRUDED METAL CASE

FRONT PANEL ALUMINUM MOUNTING FACE PLATE

BACK PANEL STEEL BLACK END PLATE

24

NEW MICROS, INC.

NMIT-0021/2 F68HC11 "GENERIC TARGET COMPUTER"TM PARTS LIST

REV 1.0 & 2.x

PART# GENERIC DESCRIPTION

----- ------------------- -----------------------------------

U1 52 PIN SOCKET

F68HC11 FORTH CPU

U2 28 PIN SOCKET

U3 28 PIN SOCKET

U4 28 PIN SOCKET

U5 44 PIN SOCKET

F68HC24 PRU PRT RPLCMNT UNT (NMIX-0022 ONLY)

U7 14 PIN SOCKET

74HC00 NAND GATE

U8 16 PIN SOCKET

74HC138 ADDRESS DECODING PROM

U9 20 PIN SOCKET

74HC373 8 BIT LATCH

Y1 8 OR 4 MHZ XTAL

R0 10K 1/8 WATT RESISTOR (Rev 2.x only)

R1 1Meg 1/8 WATT RESISTOR

R2-5 10K 1/8 WATT RESISTOR

R6 10K 1/8 WATT RESISTOR (Rev 1.0 only)

C6,7 20 pf CERAMIC DISC

C9-13 .1uf MONOLYTHIC BYPASS

C15 .1uf MONOLYTHIC BYPASS (Rev 2.x only)

LVI1 8054HN POWER ON RESET MONITOR (Rev 2.x)

Q1 VP0300L P CHANNEL FET (Rev 2.x only)

D1 1N4148 OR 1N914 SIGNAL DIODE

PCB 100 SQUARED NMIX-0021/2/3 PCB REV 1.0 or 2.x

25

NMIX-0022 REV 1.0 SILKSCREEN

26

NMIX-0022 REV 2.x SILKSCREEN

27

NMIX-0023 REV 1.0 & 2.x MECHANICALS

28

"schematic REV 1.0"

29

"schematic REV 2.x"

30

"100 SQUARED"TM DOCUMENTATION

APPLICATION NOTE

CONNECTING A PARALLEL PRINTER TO THE "100 SQUARED"TM

Being able to keep a hard copy of entered or displayed text can

be a very desirable feature during development. Further, the

ability to make written reports from a run time application may

be required of the finished system. The hook-up below shows con-

nections between the "100 SQUARED"TM and a Centronics style

printer.

This example works only on the NMIX and NMIT-0022 with the Port

Replacement Unit installed.

PRINTER SIGNAL CABLE J2 F68HC11

CONNECTOR NAME CONDUCTOR 68HC24

PIN # NUMBER 34 SIGNAL

--------- ------ --------- -- ------

1 STB 1 13 STRB (PD7)

19 GND 2 11 GND

2 D0 3 8 PC0

20 GND 4 GND

3 D1 5 7 PC1

21 GND 6 GND

4 D2 7 6 PC2

22 GND 8 GND

5 D3 9 5 PC3

23 GND 10 GND

6 D4 11 4 PC4

24 GND 12 GND

7 D5 13 3 PC5

25 GND 14 GND

8 D6 15 2 PC6

26 GND 16 GND

9 D7 17 1 PC7

27 GND 18 GND

10 ACK 19 14 STRA (PD6)

28 GND 20 GND

11-18 N.C.

29-36 N.C.

31

"100 SQUARED"TM DOCUMENTATION

APPLICATION NOTE

INTEL FORMAT DUMP COMMAND

The following program allows a section of memory to be dumped out

the serial channel in the Intel hex format which is a standard

used by many of the commercially available PROM programmers.

This program should allow the use of such programmers to capture

programs and data in EPROMs, which are not supported for program-

ming by the "100 SQUARED"TM directly.

HEX

VARIABLE CHKSUM

: CE DUP A < IF 30 ELSE 37 THEN + EMIT ; ( CONVERT AND EMIT )

: 2.R FF AND 10 /MOD CE CE ;

: 4.R 0 100 UM/MOD 2.R 2.R ;

: INTEL-DUMP ( addr count --- )

OVER + SWAP ( CONVERTS ADDR & COUNT TO UPPER, LOWER ADDR )

BEGIN

CR

2DUP 20 + MIN ( MAKE NEXT LINE OF OUTPUT UP TO 32 BYTES LONG)

SWAP ( BRING UP START ADDRESS, MOVE DOWN END ADDRESS )

." :" ( BEGIN THE RECORD )

2DUP - ( FIND OUT # OF BYTES IN THIS RECORD )

DUP CHKSUM ! ( BEGIN CHKSUM COMPUTATION )

2.R ( PRINT # OF BYTES IN RECORD IN TWO DIGIT FIELD )

DUP 100 /MOD + CHKSUM +! ( ADD START ADDRESS TO CHKSUM )

DUP 4.R ( PRINT START ADDRESS IN FOUR DIGIT FIELD )

." 00" ( PRINT RECORD TYPE, NO NEED TO ADD TO CHKSUM )

>R DUP R> ( MAKE START STOP #S FOR DO LOOP )

DO

I C@ 2.R ( PRINT HEX BYTE IN TWO DIGIT FIELD )

I C@ CHKSUM +! ( UPDATE CHKSUM )

LOOP

CHKSUM @ FF AND NEGATE 2.R ( PRINT CHKSUM NEG 2 DIGIT FIELD )

2DUP =

UNTIL ( KEEP GOING TILL LINE END IS = TO BLOCK END )

CR ." :00000001FF" CR ( TACK ON END RECORD )

2DROP

;

Program and application courtesy of Danny Barger, International

Computing Scale.

32

"100 SQUARED"TM DOCUMENTATION

APPLICATION NOTE

Special consideration needs to be given to the address require-

ments of the Port Replacement Part (PRU) if it is optionally in-

stalled in a board by the user. Since the PRU is outside the

F68HC11, it must compete for its address space with other devices

on the bus, while the internal registers do not. It is possible

to accidentally "over-map" the 68HC11 PRU with another external

memory device unless some care is given to where the Max-FORTH

system is mapping its registers.

Particular care must be taken when setting one of these boards

for the 32K addressing mode which will always cause problems for

the upper 32K device and the PRU. Generally the 8K address mode

is the safest mode to use when a PRU is installed, if care is

given to the U2 jumper to prohibit "over-mapping".

In Max-FORTH revisions x.1 (and prior) the registers are at

$9000. Later revisions put the registers at $B000. Only address

lines A15 - A11 are attached to the PRU, so it will over map a 2

Kbyte area (i.e. 9000-97FF or B000-B7FF) with a skipping pattern

that repeats every 64 (40 hex) locations corresponding to the

registers it provides.

An off board address decoder could be used to disable the on

board memory using MEMDIS. It would need to generate a low sig-

nal on MEMDIS when ever there was any address in the area oc-

cupied by the PRU. In this way the memories in the 28 pin sock-

ets would be "notched out" to allow the PRU to function normally.

74HC688

+_---u----+

GND-|E Vcc|-+5V

| ___| ______

GND-|A0 A=B|-MEMDIS

| |

GND-|B0 B7|-+5V

| |

GND-|A1 A7|-A15

| |

GND-|B1 B6|-GND

| |

GND-|A2 A6|-A14

| |

GND-|B2 B5|-+5V

| |

A11-|A3 A5|-A13

| |

GND-|B3 B4|-+5V

| |

GND-|GND A4|-A12

+---------+

Above 74HC688 detects addresses B000-B7FF and controls MEMDIS.

33