( CTRL ( BASE + 6 ( 000 ( COUNT MODE NO COUNT ( 001 ( COUNT RISING EDGES OF PRIMARY SOURCE ( 010 ( COUNT RISING AND FALLING EDGES OF PRIMARY SOURCE ( 011 ( COUNT RISING EDGES OF PRIMARY SOURCE WHILE SEC. HIGH ( 100 ( QUADRATURE RISING EDGES OF PRIMARY AND SEC. SOURCE ( 101 ( COUNT PRIMARY SOURCE RISING EDGES, SEC. SPECS. DIRECTION ( 110 ( EDGE OF SEC. SOURCE TRIGGERS PRIMARY COUNT TILL COMPARE ( 111 ( CASCASE COUNTER MODE UP/DOWN ( 0000 ( Counter #0 input pin ( 0001 ( Counter #1 input pin ( 0010 ( Counter #2 input pin ( 0011 ( Counter #3 input pin ( 0100 ( Counter #0 output ( 0101 ( Counter #1 output ( 0110 ( Counter #2 output ( 0111 ( Counter #3 output ( 1000 ( PRIMARY COUNT SOURCE IP/1 ( 1001 ( PRIMARY COUNT SOURCE IP/2 ( 1010 ( PRIMARY COUNT SOURCE IP/4 ( 1011 ( PRIMARY COUNT SOURCE IP/8 ( 1100 ( PRIMARY COUNT SOURCE IP/16 ( 1101 ( PRIMARY COUNT SOURCE IP/32 ( 1110 ( PRIMARY COUNT SOURCE IP/64 ( 1111 ( PRIMARY COUNT SOURCE IP/128 ( 00 ( SECONDARY COUNT Counter # 0 input ( 01 ( SECONDARY COUNT Counter # 1 input ( 10 ( SECONDARY COUNT Counter # 2 input ( 11 ( SECONDARY COUNT Counter # 3 input ( 0 ( COUNT ONCE - 0 REPEATEDLY ( 1 ( COUNT ONCE - 1 ONCE AND STOP ( 0 ( COUNT LENGTH ROLL OVER ( 1 ( COUNT LENGTH COUNT UNTIL COMPARE AND REINITIALIZE ( 0 ( DIR COUNT UP ( 1 ( DIR COUNT DN ( 0 ( COINIT NO FORCE BY OTHER CHANNELS ( 1 ( COINIT FORCE BY OTHER COUNTER WHEN ACTIVE COMPARE ( 000 ( Active while counter is active, OUPUT MODE ( 001 ( CLEAR OFLAG OUTPUT ON SUCCESSFUL COMPARE ( 010 ( SET OFLAG OUTPUT ON SUCCESSFUL COMPARE ( 011 ( TOGGLE OFLAG OUTPUT ON SUCCESSFUL COMPARE ( 100 ( TOGGLE OFLAG USING ALTERNATING COMPARE REG ( 101 ( SET ON COMPARE, CLEAR ON SEC. SOURCE INPUT EDGE ( 110 ( SET ON COMPARE, CLEAR ON COUNTER ROLLOVER ( 111 ( ENABLE GATED CLOCK OUTPUT WHILE COUNTER IS ACTIVE ( STATUS ( BASE + 7 ( 00 TCF, TCFIE ( 00 TOF, TOFIE ( 00 IEF, IEFIE ( 0 IPS ( 0 INPUT ( 00 CAPTURE DISABLED ( 01 CAPTURE REGISTER OPERATION CAP ON RISING EDGE IF IPS=0 ( 01 CAPTURE REGISTER OPERATION CAP ON FALLING EDGE IF IPS=1 ( 10 CAPTURE REGISTER OPERATION CAP ON FALLING EDGE IF IPS=0 ( 10 CAPTURE REGISTER OPERATION CAP ON RISING EDGE IF IPS=1 ( 11 CAPTURE REGISTER OPERATION CAP ON BOTH EDGE ( 0 MASTER ( 0 EEOF ( 0 VAL ( 0 FORCE ( 0 OPS ( 0 OEN ( CTRL 1,2 ( 100 ( COUNT RISING AND FALLING EDGES OF PRIMARY SOURCE ( 00xx ( Counter #0 input pin ( xx ( SECONDARY COUNT Counter # 0 input ( 0 ( COUNT ONCE - 0 REPEATEDLY ( 0 ( COUNT LENGTH ROLL OVER ( 0 ( DIR COUNT UP ( 0 ( COINIT NO FORCE BY OTHER CHANNELS ( 000 ( OUPUT MODE, Active while counter is active ( STATUS 00 TCF, TCFIE ( 00 TOF, TOFIE ( 00 IEF, IEFIE ( 0 IPS ( 0 INPUT ( 00 CAPTURE DISABLED ( 0 MASTER ( 0 EEOF ( 0 VAL ( 0 FORCE ( 0 OPS ( 0 OEN ( CTRL 3,4 ( 111 ( CASCASE COUNTER MODE UP/DOWN ( 01xx ( Counter #0 output ( 00 ( SECONDARY COUNT Counter # 0 input ( 0 ( COUNT ONCE - 0 REPEATEDLY ( 0 ( COUNT LENGTH ROLL OVER ( 0 ( DIR COUNT UP ( 0 ( COINIT NO FORCE BY OTHER CHANNELS ( 000 ( OUPUT MODE, Active while counter is active ( TMRA 0D00 ( TMRB 0D20 ( TMRC 0D40 ( TMRD 0D60 COLD HEX : INIT 0.0 E47 2! 0.0 E57 2! ( QUAD CH 0 MADE OUT OF TMRA0/1 AND INPUTS 0/1 8080 D06 ! ( CTRL TMRA0 INA 0, INB 1 FFFF D00 ! ( CMP1 FOR OVERFLOW 0000 D01 ! ( CMP2 FOR UNDERFLOW 0000 D05 ! ( COUNTER 0000 D07 ! ( STATUS E800 D0E ! ( CTRL TMRA1 EXTENDED 32 BITS 0000 D0D ! ( COUNTER 0000 D0F ! ( STATUS ( QUAD CH 1 MADE OUT OF TMRA2/3 AND INPUTS 2/3 8580 D16 ! ( CTRL TMRA2 INA 2, INB 3 FFFF D10 ! ( CMP1 FOR OVERFLOW 0000 D11 ! ( CMP2 FOR UNDERFLOW 0000 D17 ! ( STATUS 0000 D15 ! ( COUNTER EC00 D1E ! ( CTRL TMRA3 EXTENDED 32 BITS 0000 D1D ! ( COUNTER 0000 D1F ! ( STATUS ( QUAD CH 2 MADE OUT OF TMRB0/1 AND INPUTS 0/1 8080 D26 ! ( CTRL TMRB0 INA 0, INB 1 FFFF D20 ! ( CMP1 FOR OVERFLOW 0000 D21 ! ( CMP2 FOR UNDERFLOW 0000 D25 ! ( COUNTER 0000 D27 ! ( STATUS E800 D2E ! ( CTRL TMRB1 EXTENDED 32 BITS 0000 D2D ! ( COUNTER 0000 D2F ! ( STATUS ( QUAD CH 3 MADE OUT OF TMRB2/3 AND INPUTS 2/3 8580 D36 ! ( CTRL TMRB2 INA 2, INB 3 FFFF D30 ! ( CMP1 FOR OVERFLOW 0000 D31 ! ( CMP2 FOR UNDERFLOW 0000 D37 ! ( STATUS 0000 D35 ! ( COUNTER EC00 D3E ! ( CTRL TMRB3 EXTENDED 32 BITS 0000 D3D ! ( COUNTER 0000 D3F ! ( STATUS ( QUAD CH 4 MADE OUT OF TMRC0/1 AND INPUTS 0/1 8080 D46 ! ( CTRL TMRC0 INA 0, INB 1 FFFF D40 ! ( CMP1 FOR OVERFLOW 0000 D41 ! ( CMP2 FOR UNDERFLOW 0000 D45 ! ( COUNTER 0000 D47 ! ( STATUS E800 D4E ! ( CTRL TMRA1 EXTENDED 32 BITS 0000 D4D ! ( COUNTER 0000 D4F ! ( STATUS ( SKIP CH x MADE OUT OF TMRC2/3 CAUSE NO INPUTS ( QUAD CH 5 MADE OUT OF TMRD0/1 AND INPUTS 0/1 8080 D66 ! ( CTRL TMRD0 INA 0, INB 1 FFFF D60 ! ( CMP1 FOR OVERFLOW 0000 D61 ! ( CMP2 FOR UNDERFLOW 0000 D65 ! ( COUNTER 0000 D67 ! ( STATUS E800 D6E ! ( CTRL TMRD1 EXTENDED 32 BITS 0000 D6D ! ( COUNTER 0000 D6F ! ( STATUS ( SKIP CH x MADE OUT OF TMRD2/3 CAUSE TMRD3 IS SYSTEM TIMER ; : TEST ( Define name of word. INIT BEGIN ( Use a nasty PCCloop. okay only because it is in foregnd CR ( D EMIT ( emit the return, without the linefeed ." A " ( 0E47 2@ ( do a double fetch on the A encoder hardware reg. ( 9 D.R ( format a double print to A char meaning 10 decimal D05 @ D0C @ ( TAKE LOWER WORD, UPPER WORD OUT OF TIMERS 9 D.R ( format a double print D15 @ D1C @ ( TAKE LOWER WORD, UPPER WORD OUT OF TIMERS 9 D.R ( format a double print ." B " ( 0E57 2@ ( do a double fetch on the B encoder hardware reg. ( 9 D.R ( format a double print D25 @ D2C @ ( TAKE LOWER WORD, UPPER WORD OUT OF TIMERS 9 D.R ( format a double print D35 @ D3C @ ( TAKE LOWER WORD, UPPER WORD OUT OF TIMERS 9 D.R ( format a double print ." C " D45 @ D4C @ ( TAKE LOWER WORD, UPPER WORD OUT OF TIMERS 9 D.R ( format a double print ." D " D65 @ D6C @ ( TAKE LOWER WORD, UPPER WORD OUT OF TIMERS 9 D.R ( format a double print A SPACES ( clean out toward end of line ?TERMINAL ( Look at serial register for UNTIL ( End of nasty PCCloop with backwards branch ; ( finish definition DECIMAL