( Observed Noise on the IsoPod Analog Digital Converter. 
( Posted by g_jilek, Mar. 03, 2003.
(
( Because my planned use of the IsoPod will utilize the 
( Analog Inputs quite extensively, I undertook a bit of an 
( indepth study of the reported noise.
(
( Over the years I have always tended to over design my 
( analog circuits. As a result I have had very few problems. 
( When I got my IsoPod I didn't bother with a tight interface design. 
( I had a box full of the wiring that was used in computer cases for the
( resets and LED's and the like. Handy little connectors that pluged 
( directly onto the Pod. Anyway, when I did my first analog project I 
( just soldered a couple of these wire sets to a pot and called it good. 
( The analog was noisey, I didn't think anything of it, I just found a 
( way to null out the noise and the circuit worked fine. So when this 
( thread opened up I became intrigued by the issue.
(
( Initially I used some of my eailer code that I had used to null out 
( the jitter in my RC servo ADC Front End to observe the ADC converter. 
( I could see how much the analog value was jumping around. At that 
( point I constructed another analog pot interface using individually 
( shielded twisted pair wiring with a 0.1uf ceramic cap on the power 
( leads at the pot. The shields are terminated at the signel source, 
( ie the pot. This cable improved the error. After RMDumse posted his 
( weighted average algorithm I modified it to convert the floating point 
( value back to an integer and then began testing different ADC 
( configurations to see if any of them would improve the noise problem. 
( The IsoPod that I was using for these tests was a stock V2 with linear 
( voltage regulators.
(
( The results were interesting. The main source of the observed noise 
( turned out to be coming from the computer monitor. This was mostly 
( being injected through the serial programming cable. The measurements 
( were taken with an oscillooscope at the terminals of the potentiometer.
( The computer was running throughout these tests. With the IsoPod 
( powered down and the serial cable disconnected the noise density 
( measured about 0.85mV, powering up the Pod this value went up to 2.0mV.
( Connecting the serial cable and powering down the Pod the noise read 
( 1.2mV, powering up the Pod this value went to 4.0mV. Replacing the 
( shieled cabled pot with one that was unshieled, the noise density went 
( 6.0mV. Both of these cabling setups were bypassed with a 10.0uf 
( Tantalum capacitor at J3.
(
( Testing of the operation of the ADC showed that the unshielded cable 
( had an input error count of +/- 9 while the shielded cable's error 
( count was +/- 4. I also noted that running the converter in pulsed mode
( as apposed to looped tightened up the grouping; ie. more values in the
( middle, with the error remaining the same. Disabling the sampling of 
( unused inputs also helped. The smoothed error was also better with the 
( converter running at max, 5Mhz. Another interesting note was that when
( the scope was hooked up I could see a +/-0.5 improvement in the 
( smoothed value. The optimum accumulator size was 16 to 32. This, 
( using the shielded cable, produced a smoothed value of +/-0.5. A steady
( state was achieved with an accumulator of 80, 050 hex.
(
( Conclusions: The ADC of the IsoPod V2, unmodified, is basically quite
( stable and predictable in any mode of operation that one would need to 
( run it in. The slight improvements that were observed would more than 
( likly have little effect on operation. The use of some form of a 
( weighted averaging algorithm, smoothing or hystersis is recommended to 
( improve steady state performance. The most important improvement to 
( the operation of the Analog Digital Converter is the use of a well 
( designed and shielded interface.
(
( Here is the code that I used for testing:

SCRUB

HEX

\ Analog Test Code

2VARIABLE RUN-AVG EEWORD
VARIABLE RUN# EEWORD \ Sets the Size of the Accumulator

DECIMAL
1.0E0 FCONSTANT SCALE EEWORD
HEX

\ Sets Up the Initial ADC Configuration
: ADC_INIT ( -- ) 
2000 0E80 ! \ Sets Start Bit & Once Sequential Scan Mode
0003 0E81 ! \ ADC Clock Period = IPbus/2N, N=DIV[3:0]+1
3210 0E83 ! \ Default Scan Order
7654 0E84 ! \ Default Scan Order
0002 0E85 ! \ Sample Disable Register, (Only Channel 0 is Scanned)

0.0 RUN-AVG 2!
20 RUN# !
; EEWORD

\ Provides Start Pulse to Initiate an ADC Conversion
: STARTCNV ( -- ) 
2000 0E80 ! ; EEWORD

: 8/ 2/ 2/ 2/ ; EEWORD ( n -- n ) \ Fast 8 /, Right Shift

: ANA0 ( -- n )
E89 @ 8/ ( OUTPUT REGISTER FOR ADC CHANNEL ZERO
; EEWORD

\ Calculates the Running Average of the Analog Input
: A/D ( -- ) 
RUN-AVG 2@ D>F FDUP RUN# @ S>F F/ F- F>D ANA0 S->D D+ RUN-AVG 2!
STARTCNV ; EEWORD

\ Scales the Floating Point Value & Converts it to an Integer 
: SMOOTHED. ( -- ) 
RUN-AVG 2@ D>F RUN# @ S>F F/ SCALE F* FDUP F. \ Displays both Values
FROUND F>D DROP .
; EEWORD


( TEST WORD
( DISPLAYS THE VALUE OF ADC REGISTER VS. SMOOTHED - Floating Point & Integer
: TESTZ DECIMAL BEGIN CR ANA0 . SMOOTHED. ?TERMINAL UNTIL ; EEWORD

ADC_INIT

\ Keeps the Algorithm Running
EVERY 2000 CYCLES SCHEDULE-RUNS A/D